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From Gaming to Verification : A Beginner’s Guide to UVM

Discover UVM (Universal Verification Methodology) through intuitive gaming analogies. This guide breaks down UVM essentials, making complex concepts approachable. Ideal for quick understanding without the fluff.
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Wiring in Chisel ! Module, Bundle, IO, Biconnect Operator Tutorial

In this article, I explore how Chisel is reshaping FPGA design through its innovative use of Modules, IO, Bundles, and the unique ‘Flipped’ method and biconnect operator. I’ll demonstrate how these features simplify complex hardware design tasks, enhancing module hierarchy and interface management. Join me as I delve into the synergies between Chisel and Scala, revealing a more efficient and intuitive approach to FPGA development. Whether you’re a seasoned designer or new to the field, this piece aims to illuminate the transformative potential of Chisel in the realm of digital design.
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Simple VGA tutorial with Chisel

Explore the essentials of VGA design in this practical tutorial using Chisel. Ideal for both beginners and seasoned enthusiasts, this guide simplifies complex concepts into approachable steps.
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How to solve a Sudoku with SBY ?

Using formal verification to solve a Sudoku ? go check the article I wrote on YosysHQ blog
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How to use the 7 segment on the Goboard ?

Welcome to a three-part exploration in our latest FPGA blog post. First, we navigate the intricacies of a seven-segment display design, ensuring every segment lights up as intended. Next, we transition to leveraging the GoBoard, a tool that bridges our concepts with concrete results. Finally, we converge these elements to reveal and understand a deceptive bug—a misbehaving pulse leading to a misleading display. Step by step, we dissect the design, adapt our tools, and debug the system, making complex FPGA concepts accessible and applicable.
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Trying Formal Verification with SymbiYosys and Chisel

Discover the practical applications of formal verification in hardware design. In this post, we’ll explore how tools like SymbiYosys can make the verification process accessible and effective. Learn from real-world examples, and understand the value of integrating formal verification into your design workflow.
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How to write a testbench with chisel ?

Taking the first steps into FPGA design can often be hindered by bugs in unverified designs. Dive into my latest post where I unravel the essentials of crafting testbenches in Chisel3.
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Chisel Exercice #1 : ShiftRegister as LEDs Garland

Dive into FPGA design with this concise Chisel tutorial. Learn practical skills through my step-by-step guide on button debouncing, signal stability, rising edge detectors, and toggle flip-flops, all tied together with a real-world project involving shift registers and LEDs. Ideal for beginners in FPGA.
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Chisel Registers Tutorial

Let’s delve into the study of Registers with Chisel! Learn how and when to use : Reg, RegNext, RegInit, RegEnable, ShitRegister, Shitregisters
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Chisel Multiplexers Tutorial

Discover the power of multiplexers in Chisel with our comprehensive tutorial. Learn how to effectively utilize the various Mux functions offered by Chisel, understand their applications, and gain insights into best practices. Whether you’re a beginner or an experienced Chisel user, this blog article provides step-by-step instructions and examples to enhance your understanding of multiplexers in digital design. Don’t miss out on this valuable resource for mastering multiplexers in Chisel. Read the tutorial now!
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