Blog
Chisel Types and Operators
Dive into the fundamental aspects of Chisel – data types and operators – in this detailed guide. Understand the role and application of Bits, UInt, SInt, and Boolean in Chisel. Learn to implement bitwise and arithmetic operators, bit reduction operations, and more. Useful for FPGA developers aiming for an in-depth understanding of Chisel’s building blocks.
Rule 90 in chisel
Learn how to implement Rule 90, a one-dimensional cellular automaton, using Chisel. This project is a great introduction to hardware description languages and demonstrates how to create a bundle, module, and pulse generator in Chisel. The article also provides a clear explanation of Rule 90’s logic and includes sample code for a working implementation.
My First Project using Chisel
I have always felt uneasy writing VHDL or Verilog code due to their verbose and boilerplate nature. My discomfort has prevented me from training and mastering them, so I cannot confirm whether these languages are truly bad. Consequently, I was thrilled to learn about other open-source HDL options. Today, I am delighted to write my first project in Chisel. I enjoyed it. This article won’t be an in deeps comparison of Chisel vs VHDL/Verilog or Chisel “getting started”, since I don’t fully master them, but rather sharing my noob experience and sharing the little joy I found using this language.
[How to] From Chisel to bitstream
Hello FPGAmigos ! Today, I have an upgrade on my previous article titled From HDL to bitstream with open-source toolchain. In that article, we created a project template that enabled us to go from Verilog design to bitstream, using Yosys for synthesis, NextPnR for place and route, and Icestorm for bitstream generation. I recently came across a new tool called Chisel, a new HDL, and I wanted to give it a try. Let’s add it to our workflow and replace Verilog with it.
How to install chisel with docker ?
I promise this is the last tool installation with docker I do… for now. In this ticket you will find a link to my GitHub with a Dockerfile that will allow you to install the hardware description language CHISEL.
Next week I will write an article on how to use chisel with Yosys, Icestorm and NextPnR by modify what I did with my article “From HDL to FPGA Bitstream with Open Source toolchain”. Do not hesitate to subscribe to the newsletter down below if you want to be notify 😉
From HDL to FPGA Bitstream with Open Source toolchain
Starting to learn FPGA can be challenging, and one of the biggest obstacles is the toolchain. For instance, a beginner may end up subscribing to a vendor’s website, surrendering his personal information, downloading a massive ~100GB software package, and spending half a day installing it, only to discover that he needs a license to use the IP he wanted for his project. This can be frustrating, not to mention the lack of innovation in the FPGA job, which makes our job more laborious, particularly for software engineers accustomed to more comfortable workflows.
How to install NextPnR with Docker ?
Today’s post is a short one, more like a ticket than a proper article. It’s part of a larger series that shows how to install Yosys and Icestorm with docker, and how to use them for a full open-source project.
This article is a prerequisite for the bigger article : From HDL to FPGA Bitstream with Open Source toolchain
How to install Icestorm with docker ?
Today’s post is a short one, more like a ticket than a proper article. It’s part of a larger series that shows how to install Yosys and Nextpnr with docker, and how to use them for a full open-source project.
This article is a prerequisite for the bigger article : From HDL to FPGA Bitstream with Open Source toolchain
How to install Yosys with Docker ?
To get started with learning FPGA easily, it’s best to begin with Free and Open Source Software (FOSS). The first tool you’ll need is a Synthesizer. Although I will write a full article about it in the future, for now what you need to know is that a Synthesizer will convert your Verilog or VHDL design into a Netlist.
