chisel

Learn how to implement Rule 90, a one-dimensional cellular automaton, using Chisel. This project is a great introduction to hardware description languages and demonstrates how to create a bundle, module, and pulse generator in Chisel. The article also provides a clear explanation of Rule 90’s logic and includes sample code for a working implementation.

I have always felt uneasy writing VHDL or Verilog code due to their verbose and boilerplate nature. My discomfort has prevented me from training and mastering them, so I cannot confirm whether these languages are truly bad. Consequently, I was thrilled to learn about other open-source HDL options. Today, I am delighted to write my first project in Chisel. I enjoyed it. This article won’t be an in deeps comparison of Chisel vs VHDL/Verilog or Chisel “getting started”, since I don’t fully master them, but rather sharing my noob experience and sharing the little joy I found using this language.